NVRAM vector


Contents


Introduction

The RISC OS system uses memory which is preserved whilst the power is off to store configuration information. This allows the system to start with the correct settings such as hardware configuration and user preferences. Examples of hardware configuration are settings such as the filing system to boot from and which drive should be used. User preferences include the type and volume of system beep.


Technical details

Under earlier versions of the operating system the non-volatile RAM ('NVRAM', also referred to as CMOS RAM, or battery backed RAM) was handled entirely by the Kernel. From Kernel 9.48, the handling of NVRAM is delegated to hardware support modules. The Kernel communicates with these modules through the vector NVRAMV.

Driver modules which provide the NVRAMV vector should be initialised with the early initialisation flag (module flags bit 1) set. This allows the modules to be started before the configuration for unplugged modules is required.

Terminology

The configuration data handled by NVRAMV has generally been termed 'CMOS' or 'CMOS data'. Historically, the configuration information was used CMOS technology to store the contents of the memory, but this is not required. The name 'non-volative RAM' is a more general term which does not imply the use of a particular technology, so is used to describe the mecanishm for storing the configuration data.


Software vectors


NVRAMV
(Vector &3E)

Operations on non-volatile memory used for configuration
On entry
R0=reason code:

ValueMeaning
0Populate the cache with NVRAM data
1Read a single value from NVRAM
2Write a single value to NVRAM

On exit
R0=-1 if handled, preserved if not handled
R1-9=dependant on reason code
Interrupts
Interrupts are undefined
Fast interrupts are enabled
Processor mode
Processor is in SVC mode
Re-entrancy
Vector is not re-entrant
Use

This vector is called by the Kernel to control the configuration data stored in the NVRAM.

Related SWIs
OS_Byte 161, OS_Byte 162

NVRAMV 0
(Vector &3E)

Populate the cache with NVRAM data
On entry
R0=0 (reason code)
R1=pointer to cache block to fill
R2=number of bytes to fill
On exit
R0=-1 (operation complete)
R1preserved
R2=number of bytes populated
Interrupts
Interrupts are undefined
Fast interrupts are enabled
Processor mode
Processor is in SVC mode
Re-entrancy
Vector is not re-entrant
Use

This vector is called by the Kernel to fill in its cache of NVRAM values. A cache is provided in order to reduce the impact of repeated reading of configuration data by clients. Clients should write 0 to the cache for unsupported values. The number of bytes to fill may take any value. The total amount of NVRAM should be returned, not the amount of NVRAM filled. Only the first 240 bytes of NVRAM will be used by the Kernel initially.

Related APIs
None

NVRAMV 1
(Vector &3E)

Read a single value from NVRAM
On entry
R0=1 (reason code)
R1=byte to read
On exit
R0=-1 (operation complete)
R1=value read, or 0 if byte is out of range
Interrupts
Interrupts are undefined
Fast interrupts are enabled
Processor mode
Processor is in SVC mode
Re-entrancy
Vector is not re-entrant
Use

This vector is called by the Kernel to read a single value. It will usually only be used before the NVRAM cache has been populated during system initialisation.

Related SWIs
OS_Byte 161

NVRAMV 2
(Vector &3E)

Write a single value to NVRAM
On entry
R0=2 (reason code)
R1=byte to read
On exit
R0=-1 (operation complete)
R1=value read, or 0 if byte is out of range
Interrupts
Interrupts are undefined
Fast interrupts are enabled
Processor mode
Processor is in SVC mode
Re-entrancy
Vector is not re-entrant
Use

This vector is called by the Kernel to write a single value to the NVRAM.

Related SWIs
OS_Byte 162

Document information

Maintainer(s):
History:
RevisionDateAuthorChanges
131 May 2023GerphInitial version
  • Created from Select technical documentation.
Related:http://www.riscos.com/support/developers/riscos6/hardware/nvramv.html
Disclaimer:

© Gerph, 2023.